The Southbridge, a crucial integrated circuit on the motherboard, plays a pivotal role in managing the hard drive controller, I/O controller, and integrated hardware such as the sound card, video card, USB, PCI, ISA, IDE, BIOS, and Ethernet. Its functions are integral to the motherboard’s smooth operation.
The Southbridge gets its name for commonly being South of the PCI bus. The Southbridge is one of the two chips in the core logic chipset on a personal computer (PC) motherboard, the other being the Northbridge.
The Southbridge typically implements the slower capabilities of the motherboard in a Northbridge/southbridge chipset computer architecture, which are:
a)Handshake between CPU-SB and clock generator
b)SB Power Button Timing
c)S1 and S2 Reset Timing
d)The SB controls the system reset signal timings provided in this section.
ROMRST#
ROMRST# is a crucial signal used to reset the LPC system ROM. The Southbridge, often called ‘SB, ‘generates ROMRST# and controls the required Timing for this signal. Depending on the system configuration, the Timing of the ROMRST# may be referenced as the RSMRST# or A_RST#.
It enables the embedded controller (EC) to force the SB to assert the ROMRST# concerning the RSMRST#. This allows the EC to access the ROM before the system access cycle begins, a critical step in the system’s boot process.
a)The ROMRST# timing is shown with respect to RSMRST# and A_RST#
b)It indicates the timing values that apply to each platform configuration.
c)S3 Timing
d)S3_S5 running on EC after SUSB and SUSC sent back to EC
e)S4 and S5 Timing
f)Handshake between Clk_Gen with CPU and ICH
Due to its operation at a very small current, the Southbridge requires careful handling. It’s crucial to ensure the accuracy of the ICH/PCH RTC circuit for each specific board design and RTC circuit layout.
This can be achieved by optimizing the external load capacitance with the correct values of the tuning fork capacitors C1/C2, ensuring safety and accuracy in your work.
Time loss under environmental stress conditions depends on motherboard factors (cleanliness, discrete component characteristics, layout, fork capacitor values) and condensation.
If time loss is observed in your system, check all of the sources of inaccuracy listed in this document to improve the internet’s immunity.l
ICH/PCH oscillator to time loss.